angadir said:Hi E'Body!
I would like to if its possible to generate "Real" RANDOM Number in HDL (Verilog)?
If yes...How?
Thanks,
Ravi
real my_real;
integer lsb, msb;
reg [63:0] my_64_bits;
lsb = $random; msb = $random;
my_64_bits = {msb, lsb};
my_real = $bitstoreal (my_64_bits);
aji_vlsi said:angadir said:Hi E'Body!
I would like to if its possible to generate "Real" RANDOM Number in HDL (Verilog)?
If yes...How?
Thanks,
Ravi
What is "Real RANDOM number"?
1. $random - pure random number generator, returns 32-bit.
2. If you want to randomize a "real my_real" variable, then use:
Code:real my_real; integer lsb, msb; reg [63:0] my_64_bits; lsb = $random; msb = $random; my_64_bits = {msb, lsb}; my_real = $bitstoreal (my_64_bits);
HTH
Ajeetha, CVC
www.noveldv.com